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Dual, Unipolar/Bipolar, High-Voltage
Digital Pulsers
Pin Description (continued)
PIN
31, 32
34
35
37
38
40, 41
42
43
46
47
48
49
50
51
52
53
56
—
NAME
V NN2
ON2
OCN2
OCP2
OP2
V PP2
C GP2
C DP2
C GC2
C DC2
V EE2
V DD
V SS
V EE1
C DC1
C GC1
C DP1
EP
FUNCTION
Channel 2 High-Side Negative Supply Voltage Input. Bypass V NN2 to GND with a 0.1μF as close as
possible to the device. See the Power Supplies and Bypassing section. Depending on the output,
additional bypassing may be required.
Channel 2 Low-Side Drain Output
Channel 2 Low-Side Clamp Output
Channel 2 High-Side Clamp Output
Channel 2 High-Side Drain Output
Channel 2 High-Side Supply Voltage Input. Bypass V PP2 to GND with a 0.1μF as close as possible to the
device. See the Power Supplies and Bypassing section. Depending on the output, additional bypassing
may be required.
Channel 2 High-Side Gate Input. Connect a 1nF to 10nF capacitor between C DP2 and C GP2 as close as
possible to the device.
Channel 2 High-Side Driver Output. Connect a 1nF to 10nF capacitor between C DP2 and C GP2 as close
as possible to the device.
Channel 2 High-Side Clamp Gate Input. Connect a 1nF to 10nF capacitor between C DC2 and C GC2 as
close as possible to the device.
Channel 2 High-Side Clamp Driver Output. Connect a 1nF to 10nF capacitor between C DC2 and C GC2 as
close as possible to the device.
Channel 2 Negative Supply Input. |V EE2 | ≤ V CC2 . Gate Drive Supply Voltage for the OCP clamp. Bypass
V EE2 to GND with a 0.1μF as close as possible to the device. See the Power Supplies and Bypassing
section. Depending on the output, additional bypassing may be required.
Logic Supply Voltage Input. Bypass V DD to GND with a 0.1μF as close as possible to the device. See the
Power Supplies and Bypassing section. Depending on the output, additional bypassing may be
required.
Substrate Voltage. Connect V SS to a voltage equal to or more negative than the more negative of V NN1 or
V NN2 .
Channel 1 Negative Supply Input. |V EE1 | ≤ V CC1 . Gate Drive Supply Voltage for the OCP clamp. Bypass
V EE1 to GND with a 0.1μF as close as possible to the device. See the Power Supplies and Bypassing
section. Depending on the output, additional bypassing may be required.
Channel 1 High-Side Clamp Driver Output. Connect a 1nF to 10nF capacitor between C DC1 and C GC1 as
close as possible to the device.
Channel 1 High-Side Clamp Gate Input. Connect a 1nF to 10nF capacitor between C DC1 and C GC1 as
close as possible to the device.
Channel 1 High-Side Driver Output. Connect a 1nF to 10nF capacitor between C DP1 and C GP1 as close
as possible to the device.
Exposed Pad. EP must be connected to V SS . Do not use EP as the only V SS connection for the device.
Detailed Description
The MAX4810/MAX4811/MAX4812 are dual high-volt-
age, high-speed pulsers that can be independently
configured for either unipolar or bipolar pulse outputs.
These devices have independent logic inputs for full
pulse control and independent active clamps. The
clamp input, INC_, can be set high to activate the
clamp automatically when the device is not pulsing to
the positive or negative high-voltage supplies.
Logic Inputs (INP_, INN_, INC_, EN_, SHDN )
The MAX4810/MAX4811/MAX4812 have a total of nine
logic input signals. SHDN controls power-up and power-
down of the device. There are two sets of INP_, INN_,
INC_, and EN_ signals: one for each channel. INP_
_______________________________________________________________________________________
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